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usb_drv.h
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1 /* This file has been prepared for Doxygen automatic documentation generation.*/
2 /*! \file *********************************************************************
3  *
4  * \brief
5  * This file contains the USB driver routines.
6  *
7  * \addtogroup usbstick
8  *
9  * \author
10  * Atmel Corporation: http://www.atmel.com \n
11  * Support email: avr@atmel.com
12  *
13  ******************************************************************************/
14 /* Copyright (c) 2008 ATMEL Corporation
15  All rights reserved.
16 
17  Redistribution and use in source and binary forms, with or without
18  modification, are permitted provided that the following conditions are met:
19 
20  * Redistributions of source code must retain the above copyright
21  notice, this list of conditions and the following disclaimer.
22  * Redistributions in binary form must reproduce the above copyright
23  notice, this list of conditions and the following disclaimer in
24  the documentation and/or other materials provided with the
25  distribution.
26  * Neither the name of the copyright holders nor the names of
27  contributors may be used to endorse or promote products derived
28  from this software without specific prior written permission.
29 
30  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
31  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
34  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
35  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
36  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
37  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
38  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40  POSSIBILITY OF SUCH DAMAGE.
41 */
42 
43 #ifndef _USB_DRV_H_
44 #define _USB_DRV_H_
45 
46 #include "compiler.h"
47 
48 /**
49  * \addtogroup usbdriver
50  * @{
51  */
52 
53 //_____ I N C L U D E S ____________________________________________________
54 
55 
56 typedef enum endpoint_parameter{ep_num, ep_type, ep_direction, ep_size, ep_bank, nyet_status} t_endpoint_parameter;
57 
58 
59 //_____ M A C R O S ________________________________________________________
60 
61 #define MAX_EP_NB 7
62 
63 #define EP_CONTROL 0
64 #define EP_1 1
65 #define EP_2 2
66 #define EP_3 3
67 #define EP_4 4
68 #define EP_5 5
69 #define EP_6 6
70 #define EP_7 7
71 
72 #define PIPE_CONTROL 0
73 #define PIPE_0 0
74 #define PIPE_1 1
75 #define PIPE_2 2
76 #define PIPE_3 3
77 #define PIPE_4 4
78 #define PIPE_5 5
79 #define PIPE_6 6
80 #define PIPE_7 7
81 
82 // USB EndPoint
83 #define MSK_EP_DIR 0x7F
84 #define MSK_UADD 0x7F
85 #define MSK_EPTYPE 0xC0
86 #define MSK_EPSIZE 0x70
87 #define MSK_EPBK 0x0C
88 #define MSK_DTSEQ 0x0C
89 #define MSK_NBUSYBK 0x03
90 #define MSK_CURRBK 0x03
91 #define MSK_DAT 0xFF // UEDATX
92 #define MSK_BYCTH 0x07 // UEBCHX
93 #define MSK_BYCTL 0xFF // UEBCLX
94 #define MSK_EPINT 0x7F // UEINT
95 #define MSK_HADDR 0xFF // UHADDR
96 
97 // USB Pipe
98 #define MSK_PNUM 0x07 // UPNUM
99 #define MSK_PRST 0x7F // UPRST
100 #define MSK_PTYPE 0xC0 // UPCFG0X
101 #define MSK_PTOKEN 0x30
102 #define MSK_PEPNUM 0x0F
103 #define MSK_PSIZE 0x70 // UPCFG1X
104 #define MSK_PBK 0x0C
105 
106 #define MSK_NBUSYBK 0x03
107 
108 #define MSK_ERROR 0x1F
109 
110 #define MSK_PTYPE 0xC0 // UPCFG0X
111 #define MSK_PTOKEN 0x30
112 #define MSK_TOKEN_SETUP 0x30
113 #define MSK_TOKEN_IN 0x10
114 #define MSK_TOKEN_OUT 0x20
115 #define MSK_PEPNUM 0x0F
116 
117 #define MSK_PSIZE 0x70 // UPCFG1X
118 #define MSK_PBK 0x0C
119 
120 
121 // Parameters for endpoint configuration
122 // These define are the values used to enable and configure an endpoint.
123 #define TYPE_CONTROL 0
124 #define TYPE_ISOCHRONOUS 1
125 #define TYPE_BULK 2
126 #define TYPE_INTERRUPT 3
127  //typedef enum ep_type {TYPE_CONTROL, TYPE_BULK, TYPE_ISOCHRONOUS, TYPE_INTERRUPT} e_ep_type;
128 
129 #define DIRECTION_OUT 0
130 #define DIRECTION_IN 1
131  //typedef enum ep_dir {DIRECTION_OUT, DIRECTION_IN} e_ep_dir;
132 
133 #define SIZE_8 0
134 #define SIZE_16 1
135 #define SIZE_32 2
136 #define SIZE_64 3
137 #define SIZE_128 4
138 #define SIZE_256 5
139 #define SIZE_512 6
140 #define SIZE_1024 7
141  //typedef enum ep_size {SIZE_8, SIZE_16, SIZE_32, SIZE_64,
142  // SIZE_128, SIZE_256, SIZE_512, SIZE_1024} e_ep_size;
143 
144 #define ONE_BANK 0
145 #define TWO_BANKS 1
146  //typedef enum ep_bank {ONE_BANK, TWO_BANKS} e_ep_bank;
147 
148 #define NYET_ENABLED 0
149 #define NYET_DISABLED 1
150  //typedef enum ep_nyet {NYET_DISABLED, NYET_ENABLED} e_ep_nyet;
151 
152 #define TOKEN_SETUP 0
153 #define TOKEN_IN 1
154 #define TOKEN_OUT 2
155 
156 #define Is_ep_addr_in(x) ( (x&0x80)? TRUE : FALSE)
157 
158 
159 //! @ingroup usbdriver
160 //! @defgroup Endpoints_configuration Configuration macros for endpoints
161 //! List of the standard macro used to configure pipes and endpoints
162 //! @{
163 #define Usb_build_ep_config0(type, dir, nyet) ((type<<6) /*| (nyet<<1)*/ | (dir))
164 #define Usb_build_ep_config1(size, bank ) ((size<<4) | (bank<<2) )
165 #define usb_configure_endpoint(num, type, dir, size, bank, nyet) \
166  ( Usb_select_endpoint(num), \
167  usb_config_ep(Usb_build_ep_config0(type, dir, nyet),\
168  Usb_build_ep_config1(size, bank) ))
169 
170 #define Host_build_pipe_config0(type, token, ep_num) ((type<<6) | (token<<4) | (ep_num))
171 #define Host_build_pipe_config1(size, bank ) ((size<<4) | (bank<<2) )
172 #define host_configure_pipe(num, type, token,ep_num, size, bank, freq) \
173  ( Host_select_pipe(num), \
174  Host_set_interrupt_frequency(freq), \
175  host_config_pipe(Host_build_pipe_config0(type, token, ep_num),\
176  Host_build_pipe_config1(size, bank) ))
177 //! @}
178 
179 //! @ingroup usbdriver
180 //! @defgroup USB_regulator USB Pads Regulator drivers
181 //! Turns ON/OFF USB pads regulator
182 //! @{
183  //! Enable internal USB pads regulator
184 #define Usb_enable_regulator() (UHWCON |= (1<<UVREGE))
185  //! Disable internal USB pads regulator
186 #define Usb_disable_regulator() (UHWCON &= ~(1<<UVREGE))
187  //! Check regulator enable bit
188 #define Is_usb_regulator_enabled() ((UHWCON & (1<<UVREGE)) ? TRUE : FALSE)
189 //! @}
190 
191 //! @ingroup usbdriver
192 //! @defgroup gen_usb USB common management drivers
193 //! These macros manage the USB controller
194 //! @{
195  //! Enable external UID pin
196 #define Usb_enable_uid_pin() (UHWCON |= (1<<UIDE))
197  //! Disable external UID pin
198 #define Usb_disable_uid_pin() (UHWCON &= ~(1<<UIDE))
199  //! Disable external UID pin and force device mode
200 #define Usb_force_device_mode() (Usb_disable_uid_pin(), UHWCON |= (1<<UIMOD))
201  //! Disable external UID pin and force host mode
202 #define Usb_force_host_mode() (Usb_disable_uid_pin(), UHWCON &= ~(1<<UIMOD))
203  //! Enable external UVCON pin
204 #define Usb_enable_uvcon_pin() (UHWCON |= (1<<UVCONE))
205  //! Enable external UVCON pin
206 #define Usb_disable_uvcon_pin() (UHWCON &= ~(1<<UVCONE))
207  //! Use device full speed mode (default mode)
208 #define Usb_full_speed_mode() (UDCON &= ~(1<<LSM))
209  //! For device mode, force low speed mode
210 #define Usb_low_speed_mode() (UDCON |= (1<<LSM))
211 
212  //! Enable both USB interface and Vbus pad
213 #define Usb_enable() (USBCON |= ((1<<USBE) | (1<<OTGPADE)))
214  //! Disable both USB interface and Vbus pad
215 #define Usb_disable() (USBCON &= ~((1<<USBE) | (1<<OTGPADE)))
216 #define Is_usb_enabled() ((USBCON & (1<<USBE)) ? TRUE : FALSE)
217 
218  //! Enable VBUS pad
219 #define Usb_enable_vbus_pad() (USBCON |= (1<<OTGPADE))
220  //! Disable VBUS pad
221 #define Usb_disable_vbus_pad() (USBCON &= ~(1<<OTGPADE))
222 
223 #define Usb_select_device() (USBCON &= ~(1<<HOST))
224 #define Usb_select_host() (USBCON |= (1<<HOST))
225 #define Is_usb_host_enabled() ((USBCON & (1<<HOST)) ? TRUE : FALSE)
226 
227  //! Stop internal USB clock in interface (freeze the interface register)
228 #define Usb_freeze_clock() (USBCON |= (1<<FRZCLK))
229 #define Usb_unfreeze_clock() (USBCON &= ~(1<<FRZCLK))
230 #define Is_usb_clock_freezed() ((USBCON & (1<<FRZCLK)) ? TRUE : FALSE)
231 
232 #define Usb_enable_id_interrupt() (USBCON |= (1<<IDTE))
233 #define Usb_disable_id_interrupt() (USBCON &= ~(1<<IDTE))
234 #define Is_usb_id_interrupt_enabled() ((USBCON & (1<<IDTE)) ? TRUE : FALSE)
235 #define Is_usb_id_device() ((USBSTA & (1<<ID)) ? TRUE : FALSE)
236 #define Usb_ack_id_transition() (USBINT = ~(1<<IDTI))
237 #define Is_usb_id_transition() ((USBINT & (1<<IDTI)) ? TRUE : FALSE)
238 
239 #define Usb_enable_vbus_interrupt() (USBCON |= (1<<VBUSTE))
240 #define Usb_disable_vbus_interrupt() (USBCON &= ~(1<<VBUSTE))
241 #define Is_usb_vbus_interrupt_enabled() ((USBCON & (1<<VBUSTE)) ? TRUE : FALSE)
242 #define Is_usb_vbus_high() ((USBSTA & (1<<VBUS)) ? TRUE : FALSE)
243 #define Is_usb_vbus_low() ((USBSTA & (1<<VBUS)) ? FALSE : TRUE)
244 #define Usb_ack_vbus_transition() (USBINT = ~(1<<VBUSTI))
245 #define Is_usb_vbus_transition() ((USBINT & (1<<VBUSTI)) ? TRUE : FALSE)
246 
247  //! returns the USB general interrupts (interrupt enabled)
248 #define Usb_get_general_interrupt() (USBINT & (USBCON & MSK_IDTE_VBUSTE))
249  //! acks the general interrupts (interrupt enabled)
250 #define Usb_ack_all_general_interrupt() (USBINT = ~(USBCON & MSK_IDTE_VBUSTE))
251 #define Usb_ack_cache_id_transition(x) ((x) &= ~(1<<IDTI))
252 #define Usb_ack_cache_vbus_transition(x) ((x) &= ~(1<<VBUSTI))
253 #define Is_usb_cache_id_transition(x) (((x) & (1<<IDTI)) )
254 #define Is_usb_cache_vbus_transition(x) (((x) & (1<<VBUSTI)))
255 
256  //! returns the USB Pad interrupts (interrupt enabled)
257 #define Usb_get_otg_interrupt() (OTGINT & OTGIEN)
258  //! acks the USB Pad interrupts (interrupt enabled)
259 #define Usb_ack_all_otg_interrupt() (OTGINT = ~OTGIEN)
260 #define Is_otg_cache_bconnection_error(x) (((x) & MSK_BCERRI))
261 #define Usb_ack_cache_bconnection_error(x) ((x) &= ~MSK_BCERRI)
262 
263 #define Usb_enter_dpram_mode() (UDPADDH = (1<<DPACC))
264 #define Usb_exit_dpram_mode() (UDPADDH = (U8)~(1<<DPACC))
265 #define Usb_set_dpram_address(addr) (UDPADDH = (1<<DPACC) + ((Uint16)addr >> 8), UDPADDL = (Uchar)addr)
266 #define Usb_write_dpram_byte(val) (UEDATX=val)
267 #define Usb_read_dpram_byte() (UEDATX)
268 
269  //! requests for VBus activation
270 #define Usb_enable_vbus() (OTGCON |= (1<<VBUSREQ))
271  //! requests for VBus desactivation
272 #define Usb_disable_vbus() (OTGCON |= (1<<VBUSRQC))
273  //! Manually request VBUS without UVCON signal from USB interface
274 #define Usb_enable_manual_vbus() (PORTE|=0x80,DDRE|=0x80,Usb_disable_uvcon_pin())
275 
276  //! initiates a Host Negociation Protocol
277 #define Usb_device_initiate_hnp() (OTGCON |= (1<<HNPREQ))
278  //! accepts a Host Negociation Protocol
279 #define Usb_host_accept_hnp() (OTGCON |= (1<<HNPREQ))
280  //! rejects a Host Negociation Protocol
281 #define Usb_host_reject_hnp() (OTGCON &= ~(1<<HNPREQ))
282  //! initiates a Session Request Protocol
283 #define Usb_device_initiate_srp() (OTGCON |= (1<<SRPREQ))
284  //! selects VBus as SRP method
285 #define Usb_select_vbus_srp_method() (OTGCON |= (1<<SRPSEL))
286  //! selects data line as SRP method
287 #define Usb_select_data_srp_method() (OTGCON &= ~(1<<SRPSEL))
288  //! enables hardware control on VBus
289 #define Usb_enable_vbus_hw_control() (OTGCON &= ~(1<<VBUSHWC))
290  //! disables hardware control on VBus
291 #define Usb_disable_vbus_hw_control() (OTGCON |= (1<<VBUSHWC))
292  //! tests if VBus has been requested
293 #define Is_usb_vbus_enabled() ((OTGCON & (1<<VBUSREQ)) ? TRUE : FALSE)
294  //! tests if a HNP occurs
295 #define Is_usb_hnp() ((OTGCON & (1<<HNPREQ)) ? TRUE : FALSE)
296  //! tests if a SRP from device occurs
297 #define Is_usb_device_srp() ((OTGCON & (1<<SRPREQ)) ? TRUE : FALSE)
298 
299  //! enables suspend time out interrupt
300 #define Usb_enable_suspend_time_out_interrupt() (OTGIEN |= (1<<STOE))
301  //! disables suspend time out interrupt
302 #define Usb_disable_suspend_time_out_interrupt() (OTGIEN &= ~(1<<STOE))
303 #define Is_suspend_time_out_interrupt_enabled() ((OTGIEN & (1<<STOE)) ? TRUE : FALSE)
304  //! acks suspend time out interrupt
305 #define Usb_ack_suspend_time_out_interrupt() (OTGINT &= ~(1<<STOI))
306  //! tests if a suspend time out occurs
307 #define Is_usb_suspend_time_out_interrupt() ((OTGINT & (1<<STOI)) ? TRUE : FALSE)
308 
309  //! enables HNP error interrupt
310 #define Usb_enable_hnp_error_interrupt() (OTGIEN |= (1<<HNPERRE))
311  //! disables HNP error interrupt
312 #define Usb_disable_hnp_error_interrupt() (OTGIEN &= ~(1<<HNPERRE))
313 #define Is_hnp_error_interrupt_enabled() ((OTGIEN & (1<<HNPERRE)) ? TRUE : FALSE)
314  //! acks HNP error interrupt
315 #define Usb_ack_hnp_error_interrupt() (OTGINT &= ~(1<<HNPERRI))
316  //! tests if a HNP error occurs
317 #define Is_usb_hnp_error_interrupt() ((OTGINT & (1<<HNPERRI)) ? TRUE : FALSE)
318 
319  //! enables role exchange interrupt
320 #define Usb_enable_role_exchange_interrupt() (OTGIEN |= (1<<ROLEEXE))
321  //! disables role exchange interrupt
322 #define Usb_disable_role_exchange_interrupt() (OTGIEN &= ~(1<<ROLEEXE))
323 #define Is_role_exchange_interrupt_enabled() ((OTGIEN & (1<<ROLEEXE)) ? TRUE : FALSE)
324  //! acks role exchange interrupt
325 #define Usb_ack_role_exchange_interrupt() (OTGINT &= ~(1<<ROLEEXI))
326  //! tests if a role exchange occurs
327 #define Is_usb_role_exchange_interrupt() ((OTGINT & (1<<ROLEEXI)) ? TRUE : FALSE)
328 
329  //! enables B device connection error interrupt
330 #define Usb_enable_bconnection_error_interrupt() (OTGIEN |= (1<<BCERRE))
331  //! disables B device connection error interrupt
332 #define Usb_disable_bconnection_error_interrupt() (OTGIEN &= ~(1<<BCERRE))
333 #define Is_bconnection_error_interrupt_enabled() ((OTGIEN & (1<<BCERRE)) ? TRUE : FALSE)
334  //! acks B device connection error interrupt
335 #define Usb_ack_bconnection_error_interrupt() (OTGINT &= ~(1<<BCERRI))
336  //! tests if a B device connection error occurs
337 #define Is_usb_bconnection_error_interrupt() ((OTGINT & (1<<BCERRI)) ? TRUE : FALSE)
338 
339  //! enables VBus error interrupt
340 #define Usb_enable_vbus_error_interrupt() (OTGIEN |= (1<<VBERRE))
341  //! disables VBus error interrupt
342 #define Usb_disable_vbus_error_interrupt() (OTGIEN &= ~(1<<VBERRE))
343 #define Is_vbus_error_interrupt_enabled() ((OTGIEN & (1<<VBERRE)) ? TRUE : FALSE)
344  //! acks VBus error interrupt
345 #define Usb_ack_vbus_error_interrupt() (OTGINT &= ~(1<<VBERRI))
346  //! tests if a VBus error occurs
347 #define Is_usb_vbus_error_interrupt() ((OTGINT & (1<<VBERRI)) ? TRUE : FALSE)
348 
349  //! enables SRP interrupt
350 #define Usb_enable_srp_interrupt() (OTGIEN |= (1<<SRPE))
351  //! disables SRP interrupt
352 #define Usb_disable_srp_interrupt() (OTGIEN &= ~(1<<SRPE))
353 #define Is_srp_interrupt_enabled() ((OTGIEN & (1<<SRPE)) ? TRUE : FALSE)
354  //! acks SRP interrupt
355 #define Usb_ack_srp_interrupt() (OTGINT &= ~(1<<SRPI))
356  //! tests if a SRP occurs
357 #define Is_usb_srp_interrupt() ((OTGINT & (1<<SRPI)) ? TRUE : FALSE)
358 //! @}
359 
360 //! @ingroup usbdriver
361 //! @defgroup USB_device_driver USB device controller drivers
362 //! These macros manage the USB Device controller.
363 //! @{
364  //! initiates a remote wake-up
365  #define Usb_initiate_remote_wake_up() (UDCON |= (1<<RMWKUP))
366  //! detaches from USB bus
367  #define Usb_detach() (UDCON |= (1<<DETACH))
368  //! attaches to USB bus
369  #define Usb_attach() (UDCON &= ~(1<<DETACH))
370  //! test if remote wake-up still running
371  #define Is_usb_pending_remote_wake_up() ((UDCON & (1<<RMWKUP)) ? TRUE : FALSE)
372  //! test if the device is detached
373  #define Is_usb_detached() ((UDCON & (1<<DETACH)) ? TRUE : FALSE)
374 
375  //! returns the USB device interrupts (interrupt enabled)
376  #define Usb_get_device_interrupt() (UDINT & (1<<UDIEN))
377  //! acks the USB device interrupts (interrupt enabled)
378  #define Usb_ack_all_device_interrupt() (UDINT = ~(1<<UDIEN))
379 
380  //! enables remote wake-up interrupt
381  #define Usb_enable_remote_wake_up_interrupt() (UDIEN |= (1<<UPRSME))
382  //! disables remote wake-up interrupt
383  #define Usb_disable_remote_wake_up_interrupt() (UDIEN &= ~(1<<UPRSME))
384 #define Is_remote_wake_up_interrupt_enabled() ((UDIEN & (1<<UPRSME)) ? TRUE : FALSE)
385  //! acks remote wake-up
386 #define Usb_ack_remote_wake_up_start() (UDINT = ~(1<<UPRSMI))
387  //! tests if remote wake-up still running
388 #define Is_usb_remote_wake_up_start() ((UDINT & (1<<UPRSMI)) ? TRUE : FALSE)
389 
390  //! enables resume interrupt
391 #define Usb_enable_resume_interrupt() (UDIEN |= (1<<EORSME))
392  //! disables resume interrupt
393 #define Usb_disable_resume_interrupt() (UDIEN &= ~(1<<EORSME))
394 #define Is_resume_interrupt_enabled() ((UDIEN & (1<<EORSME)) ? TRUE : FALSE)
395  //! acks resume
396 #define Usb_ack_resume() (UDINT = ~(1<<EORSMI))
397  //! tests if resume occurs
398 #define Is_usb_resume() ((UDINT & (1<<EORSMI)) ? TRUE : FALSE)
399 
400  //! enables wake-up interrupt
401 #define Usb_enable_wake_up_interrupt() (UDIEN |= (1<<WAKEUPE))
402  //! disables wake-up interrupt
403 #define Usb_disable_wake_up_interrupt() (UDIEN &= ~(1<<WAKEUPE))
404 #define Is_swake_up_interrupt_enabled() ((UDIEN & (1<<WAKEUPE)) ? TRUE : FALSE)
405  //! acks wake-up
406 #define Usb_ack_wake_up() (UDINT = ~(1<<WAKEUPI))
407  //! tests if wake-up occurs
408 #define Is_usb_wake_up() ((UDINT & (1<<WAKEUPI)) ? TRUE : FALSE)
409 
410  //! enables USB reset interrupt
411 #define Usb_enable_reset_interrupt() (UDIEN |= (1<<EORSTE))
412  //! disables USB reset interrupt
413 #define Usb_disable_reset_interrupt() (UDIEN &= ~(1<<EORSTE))
414 #define Is_reset_interrupt_enabled() ((UDIEN & (1<<EORSTE)) ? TRUE : FALSE)
415  //! acks USB reset
416 #define Usb_ack_reset() (UDINT = ~(1<<EORSTI))
417  //! tests if USB reset occurs
418 #define Is_usb_reset() ((UDINT & (1<<EORSTI)) ? TRUE : FALSE)
419 
420  //! enables Start Of Frame Interrupt
421 #define Usb_enable_sof_interrupt() (UDIEN |= (1<<SOFE))
422  //! disables Start Of Frame Interrupt
423 #define Usb_disable_sof_interrupt() (UDIEN &= ~(1<<SOFE))
424 #define Is_sof_interrupt_enabled() ((UDIEN & (1<<SOFE)) ? TRUE : FALSE)
425  //! acks Start Of Frame
426 #define Usb_ack_sof() (UDINT = ~(1<<SOFI))
427  //! tests if Start Of Frame occurs
428 #define Is_usb_sof() ((UDINT & (1<<SOFI)) ? TRUE : FALSE)
429 
430  //! enables suspend state interrupt
431 #define Usb_enable_suspend_interrupt() (UDIEN |= (1<<SUSPE))
432  //! disables suspend state interrupt
433 #define Usb_disable_suspend_interrupt() (UDIEN &= ~(1<<SUSPE))
434 #define Is_suspend_interrupt_enabled() ((UDIEN & (1<<SUSPE)) ? TRUE : FALSE)
435  //! acks Suspend
436 #define Usb_ack_suspend() (UDINT = ~(1<<SUSPI))
437  //! tests if Suspend state detected
438 #define Is_usb_suspend() ((UDINT & (1<<SUSPI)) ? TRUE : FALSE)
439 
440  //! enables USB device address
441 #define Usb_enable_address() (UDADDR |= (1<<ADDEN))
442  //! disables USB device address
443 #define Usb_disable_address() (UDADDR &= ~(1<<ADDEN))
444  //! sets the USB device address
445 #define Usb_configure_address(addr) (UDADDR = (UDADDR & (1<<ADDEN)) | ((U8)addr & MSK_UADD))
446 
447  //! returns the last frame number
448 #define Usb_frame_number() ((U16)((((U16)UDFNUMH) << 8) | ((U16)UDFNUML)))
449  //! tests if a crc error occurs in frame number
450 #define Is_usb_frame_number_crc_error() ((UDMFN & (1<<FNCERR)) ? TRUE : FALSE)
451 //! @}
452 
453 
454 
455 //! @ingroup usbdriver
456 //! @defgroup usb_gen_ep USB endpoint drivers
457 //! These macros manage the common features of the endpoints.
458 //! @{
459  //! selects the endpoint number to interface with the CPU
460 #define Usb_select_endpoint(ep) (UENUM = (U8)ep )
461 
462  //! get the currently selected endpoint number
463 #define Usb_get_selected_endpoint() (UENUM )
464 
465  //! resets the selected endpoint
466 #define Usb_reset_endpoint(ep) (UERST = 1 << (U8)ep, UERST = 0)
467 
468  //! enables the current endpoint
469 #define Usb_enable_endpoint() (UECONX |= (1<<EPEN))
470  //! enables the STALL handshake for the next transaction
471 #define Usb_enable_stall_handshake() (UECONX |= (1<<STALLRQ))
472  //! resets the data toggle sequence
473 #define Usb_reset_data_toggle() (UECONX |= (1<<RSTDT))
474  //! disables the current endpoint
475 #define Usb_disable_endpoint() (UECONX &= ~(1<<EPEN))
476  //! disables the STALL handshake
477 #define Usb_disable_stall_handshake() (UECONX |= (1<<STALLRQC))
478  //! selects endpoint interface on CPU
479 #define Usb_select_epnum_for_cpu() (UECONX &= ~(1<<EPNUMS))
480  //! tests if the current endpoint is enabled
481 #define Is_usb_endpoint_enabled() ((UECONX & (1<<EPEN)) ? TRUE : FALSE)
482  //! tests if STALL handshake request is running
483 #define Is_usb_endpoint_stall_requested() ((UECONX & (1<<STALLRQ)) ? TRUE : FALSE)
484 
485  //! configures the current endpoint
486 #define Usb_configure_endpoint_type(type) (UECFG0X = (UECFG0X & ~(MSK_EPTYPE)) | ((U8)type << 6))
487  //! configures the current endpoint direction
488 #define Usb_configure_endpoint_direction(dir) (UECFG0X = (UECFG0X & ~(1<<EPDIR)) | ((U8)dir))
489 
490  //! configures the current endpoint size
491 #define Usb_configure_endpoint_size(size) (UECFG1X = (UECFG1X & ~MSK_EPSIZE) | ((U8)size << 4))
492  //! configures the current endpoint number of banks
493 #define Usb_configure_endpoint_bank(bank) (UECFG1X = (UECFG1X & ~MSK_EPBK) | ((U8)bank << 2))
494  //! allocates the current configuration in DPRAM memory
495 #define Usb_allocate_memory() (UECFG1X |= (1<<ALLOC))
496  //! un-allocates the current configuration in DPRAM memory
497 #define Usb_unallocate_memory() (UECFG1X &= ~(1<<ALLOC))
498 
499  //! acks endpoint overflow interrupt
500 #define Usb_ack_overflow_interrupt() (UESTA0X &= ~(1<<OVERFI))
501  //! acks endpoint underflow memory
502 #define Usb_ack_underflow_interrupt() (UESTA0X &= ~(1<<UNDERFI))
503  //! acks Zero Length Packet received
504 #define Usb_ack_zlp() (UESTA0X &= ~(1<<ZLPSEEN))
505  //! returns data toggle
506 #define Usb_data_toggle() ((UESTA0X&MSK_DTSEQ) >> 2)
507  //! returns the number of busy banks
508 #define Usb_nb_busy_bank() (UESTA0X & MSK_NBUSYBK)
509  //! tests if at least one bank is busy
510 #define Is_usb_one_bank_busy() ((UESTA0X & MSK_NBUSYBK) == 0 ? FALSE : TRUE)
511  //! tests if current endpoint is configured
512 #define Is_endpoint_configured() ((UESTA0X & (1<<CFGOK)) ? TRUE : FALSE)
513  //! tests if an overflows occurs
514 #define Is_usb_overflow() ((UESTA0X & (1<<OVERFI)) ? TRUE : FALSE)
515  //! tests if an underflow occurs
516 #define Is_usb_underflow() ((UESTA0X & (1<<UNDERFI)) ? TRUE : FALSE)
517  //! tests if a ZLP has been detected
518 #define Is_usb_zlp() ((UESTA0X & (1<<ZLPSEEN)) ? TRUE : FALSE)
519 
520  //! returns the control direction
521 #define Usb_control_direction() ((UESTA1X & (1<<CTRLDIR)) >> 2)
522  //! returns the number of the current bank
523 #define Usb_current_bank() ( UESTA1X & MSK_CURRBK)
524 
525  //! clears FIFOCON bit
526 #define Usb_ack_fifocon() (UEINTX &= ~(1<<FIFOCON))
527  //! acks NAK IN received
528 #define Usb_ack_nak_in() (UEINTX &= ~(1<<NAKINI))
529  //! acks NAK OUT received
530 #define Usb_ack_nak_out() (UEINTX &= ~(1<<NAKOUTI))
531  //! acks receive SETUP
532 #define Usb_ack_receive_setup() (UEINTX &= ~(1<<RXSTPI))
533 //! tests if NAK IN received
534 #define Is_usb_receive_nak_in() (UEINTX &(1<<NAKINI))
535 //! tests if NAK OUT received
536 #define Is_usb_receive_nak_out() (UEINTX &(1<<NAKOUTI))
537  //! acks reveive OUT
538 #define Usb_ack_receive_out() (UEINTX &= ~(1<<RXOUTI), Usb_ack_fifocon())
539  //! acks STALL sent
540 #define Usb_ack_stalled() (MSK_STALLEDI= 0)
541  //! acks IN ready
542 #define Usb_ack_in_ready() (UEINTX &= ~(1<<TXINI), Usb_ack_fifocon())
543  //! Kills last bank
544 #define Usb_kill_last_in_bank() (UENTTX |= (1<<RXOUTI))
545  //! tests if endpoint read allowed
546 #define Is_usb_read_enabled() (UEINTX&(1<<RWAL))
547  //! tests if endpoint write allowed
548 #define Is_usb_write_enabled() (UEINTX&(1<<RWAL))
549  //! tests if read allowed on control endpoint
550 #define Is_usb_read_control_enabled() (UEINTX&(1<<TXINI))
551  //! tests if SETUP received
552 #define Is_usb_receive_setup() (UEINTX&(1<<RXSTPI))
553  //! tests if OUT received
554 #define Is_usb_receive_out() (UEINTX&(1<<RXOUTI))
555  //! tests if IN ready
556 #define Is_usb_in_ready() (UEINTX&(1<<TXINI))
557  //! sends IN
558 #define Usb_send_in() (UEINTX &= ~(1<<FIFOCON))
559  //! sends IN on control endpoint
560 #define Usb_send_control_in() (UEINTX &= ~(1<<TXINI))
561  //! frees OUT bank
562 #define Usb_free_out_bank() (UEINTX &= ~(1<<FIFOCON))
563  //! acks OUT on control endpoint
564 #define Usb_ack_control_out() (UEINTX &= ~(1<<RXOUTI))
565 
566  //! enables flow error interrupt
567 #define Usb_enable_flow_error_interrupt() (UEIENX |= (1<<FLERRE))
568  //! enables NAK IN interrupt
569 #define Usb_enable_nak_in_interrupt() (UEIENX |= (1<<NAKINE))
570  //! enables NAK OUT interrupt
571 #define Usb_enable_nak_out_interrupt() (UEIENX |= (1<<NAKOUTE))
572  //! enables receive SETUP interrupt
573 #define Usb_enable_receive_setup_interrupt() (UEIENX |= (1<<RXSTPE))
574  //! enables receive OUT interrupt
575 #define Usb_enable_receive_out_interrupt() (UEIENX |= (1<<RXOUTE))
576  //! enables STALL sent interrupt
577 #define Usb_enable_stalled_interrupt() (UEIENX |= (1<<STALLEDE))
578  //! enables IN ready interrupt
579 #define Usb_enable_in_ready_interrupt() (UEIENX |= (1<<TXINE))
580  //! disables flow error interrupt
581 #define Usb_disable_flow_error_interrupt() (UEIENX &= ~(1<<FLERRE))
582  //! disables NAK IN interrupt
583 #define Usb_disable_nak_in_interrupt() (UEIENX &= ~(1<<NAKINE))
584  //! disables NAK OUT interrupt
585 #define Usb_disable_nak_out_interrupt() (UEIENX &= ~(1<<NAKOUTE))
586  //! disables receive SETUP interrupt
587 #define Usb_disable_receive_setup_interrupt() (UEIENX &= ~(1<<RXSTPE))
588  //! disables receive OUT interrupt
589 #define Usb_disable_receive_out_interrupt() (UEIENX &= ~(1<<RXOUTE))
590  //! disables STALL sent interrupt
591 #define Usb_disable_stalled_interrupt() (UEIENX &= ~(1<<STALLEDE))
592  //! disables IN ready interrupt
593 #define Usb_disable_in_ready_interrupt() (UEIENX &= ~(1<<TXIN))
594 
595  //! returns FIFO byte for current endpoint
596 #define Usb_read_byte() (UEDATX)
597  //! writes byte in FIFO for current endpoint
598 #define Usb_write_byte(byte) (UEDATX = (U8)byte)
599 
600  //! returns number of bytes in FIFO current endpoint (16 bits)
601 #define Usb_byte_counter() ((((U16)UEBCHX) << 8) | (UEBCLX))
602  //! returns number of bytes in FIFO current endpoint (8 bits)
603 #define Usb_byte_counter_8() ((U8)UEBCLX)
604 
605  //! tests the general endpoint interrupt flags
606 #define Usb_interrupt_flags() (UEINT)
607  //! tests the general endpoint interrupt flags
608 #define Is_usb_endpoint_event() (Usb_interrupt_flags() != 0x00)
609 //! @}
610 
611 
612 //! @ingroup usbdriver
613 //! @defgroup host_management USB host controller drivers
614 //! These macros manage the USB Host controller.
615 //! @{
616  //! allocates the current configuration in DPRAM memory
617  #define Host_allocate_memory() (UPCFG1X |= (1<<ALLOC))
618  //! un-allocates the current configuration in DPRAM memory
619  #define Host_unallocate_memory() (UPCFG1X &= ~(1<<ALLOC))
620 
621  //! enables USB Host function
622  #define Host_enable() (USBCON |= (1<<HOST))
623 
624  #ifndef SOFEN
625  #define SOFEN 0 //For AVRGCC, SOFEN bit missing in default sfr file
626  #endif
627  //! enables SOF generation
628  #define Host_enable_sof() (UHCON |= (1<<SOFEN))
629  //! disables SOF generation
630  #define Host_disable_sof() (UHCON &= ~(1<<SOFEN))
631  //! sends a USB Reset to the device
632  #define Host_send_reset() (UHCON |= (1<<RESET))
633  //! tests if USB Reset running
634  #define Host_is_reset() ((UHCON & (1<<RESET)) ? TRUE : FALSE)
635  //! sends a USB Resume to the device
636  #define Host_send_resume() (UHCON |= (1<<RESUME))
637  //! tests if USB Resume running
638  #define Host_is_resume() ((UHCON & (1<<RESUME)) ? TRUE : FALSE)
639 
640  //! enables host start of frame interrupt
641  #define Host_enable_sof_interrupt() (UHIEN |= (1<<HSOFE))
642  //! enables host start of frame interrupt
643  #define Host_disable_sof_interrupt() (UHIEN &= ~(1<<HSOFE))
644 #define Is_host_sof_interrupt_enabled() ((UHIEN & (1<<HSOFE)) ? TRUE : FALSE)
645  //! tests if SOF detected
646 #define Host_is_sof() ((UHINT & (1<<HSOFI)) ? TRUE : FALSE)
647 #define Is_host_sof() ((UHINT & (1<<HSOFI)) ? TRUE : FALSE)
648 #define Host_ack_sof() (UHINT &= ~(1<<HSOFI))
649 
650  //! enables host wake up interrupt detection
651 #define Host_enable_hwup_interrupt() (UHIEN |= (1<<HWUPE))
652  //! disables host wake up interrupt detection
653 #define Host_disable_hwup_interrupt() (UHIEN &= ~(1<<HWUPE))
654 #define Is_host_hwup_interrupt_enabled() ((UHIEN & (1<<HWUPE)) ? TRUE : FALSE)
655  //! tests if host wake up detected
656 #define Host_is_hwup() ((UHINT & (1<<HWUPI)) ? TRUE : FALSE)
657  //! Ack host wake up detection
658 #define Is_host_hwup() ((UHINT & (1<<HWUPI)) ? TRUE : FALSE)
659 #define Host_ack_hwup() (UHINT &= ~(1<<HWUPI))
660 
661  //! enables host down stream rsm sent interrupt detection
662 #define Host_enable_down_stream_resume_interrupt() (UHIEN |= (1<<RSMEDE))
663  //! disables host down stream rsm sent interrupt detection
664 #define Host_disable_down_stream_resume_interrupt() (UHIEN &= ~(1<<RSMEDE))
665 #define Is_host_down_stream_resume_interrupt_enabled() ((UHIEN & (1<<RSMEDE)) ? TRUE : FALSE)
666  //! Ack host down stream resume sent
667 #define Is_host_down_stream_resume() ((UHINT & (1<<RSMEDI)) ? TRUE : FALSE)
668 #define Host_ack_down_stream_resume() (UHINT &= ~(1<<RSMEDI))
669 
670  //! enables host remote wake up interrupt detection
671 #define Host_enable_remote_wakeup_interrupt() (UHIEN |= (1<<RXRSME))
672  //! disables host remote wake up interrupt detection
673 #define Host_disable_remote_wakeup_interrupt() (UHIEN &= ~(1<<RXRSME))
674 #define Is_host_remote_wakeup_interrupt_enabled() ((UHIEN & (1<<RXRSME)) ? TRUE : FALSE)
675  //! tests if host wake up detected
676 #define Host_is_remote_wakeup() ((UHINT & (1<<RXRSMI)) ? TRUE : FALSE)
677  //! Ack host wake up detection
678 #define Is_host_remote_wakeup() ((UHINT & (1<<RXRSMI)) ? TRUE : FALSE)
679 #define Host_ack_remote_wakeup() (UHINT &= ~(1<<RXRSMI))
680 
681  //! enables host device connection interrupt
682 #define Host_enable_device_connection_interrupt() (UHIEN |= (1<<DCONNE))
683  //! disables USB device connection interrupt
684 #define Host_disable_device_connection_interrupt() (UHIEN &= ~(1<<DCONNE))
685 #define Is_host_device_connection_interrupt_enabled() ((UHIEN & (1<<DCONNE)) ? TRUE : FALSE)
686  //! tests if a USB device has been detected
687 #define Is_device_connection() (UHINT & (1<<DCONNI))
688  //! acks device connection
689 #define Host_ack_device_connection() (UHINT = ~(1<<DCONNI))
690 
691  //! enables host device disconnection interrupt
692 #define Host_enable_device_disconnection_interrupt() (UHIEN |= (1<<DDISCE))
693  //! disables USB device connection interrupt
694 #define Host_disable_device_disconnection_interrupt() (UHIEN &= ~(1<<DDISCE))
695 #define Is_host_device_disconnection_interrupt_enabled() ((UHIEN & (1<<DDISCE)) ? TRUE : FALSE)
696  //! tests if a USB device has been removed
697 #define Is_device_disconnection() (UHINT & (1<<DDISCI) ? TRUE : FALSE)
698  //! acks device disconnection
699 #define Host_ack_device_disconnection() (UHINT = ~(1<<DDISCI))
700 
701  //! enables host USB reset interrupt
702 #define Host_enable_reset_interrupt() (UHIEN |= (1<<RSTE))
703  //! disables host USB reset interrupt
704 #define Host_disable_reset_interrupt() (UHIEN &= ~(1<<RSTE))
705 #define Is_host_reset_interrupt_enabled() ((UHIEN & (1<<RSTE)) ? TRUE : FALSE)
706  //! acks host USB reset sent
707 #define Host_ack_reset() (UHINT = ~(1<<RSTI))
708  //! tests if USB reset has been sent
709 #define Is_host_reset() Host_is_reset()
710 
711 
712  //! switches on VBus
713 #define Host_vbus_request() (OTGCON |= (1<<VBUSREQ))
714  //! switches off VBus
715 #define Host_clear_vbus_request() (OTGCON |= (1<<VBUSRQC))
716  //! configures the address to use for the device
717 #define Host_configure_address(addr) (UHADDR = addr & MSK_HADDR)
718 
719  //! Get connected device speed, returns TRUE when in full speed mode
720 #define Is_host_full_speed() ((USBSTA & (1<<SPEED)) ? TRUE : FALSE)
721 //! @}
722 
723 
724 //! @ingroup usbdriver
725 //! @defgroup general_pipe USB pipe drivers
726 //! These macros manage the common features of the pipes.
727 //! @{
728  //! selects pipe for CPU interface
729 #define Host_select_pipe(p) (UPNUM = (U8)p)
730 
731  //! get the currently selected pipe number
732 #define Host_get_selected_pipe() (UPNUM )
733 
734  //! enables pipe
735 #define Host_enable_pipe() (UPCONX |= (1<<PEN))
736  //! disables pipe
737 #define Host_disable_pipe() (UPCONX &= ~(1<<PEN))
738 
739  //! sets SETUP token
740 #define Host_set_token_setup() (UPCFG0X = UPCFG0X & ~MSK_TOKEN_SETUP)
741  //! sets IN token
742 #define Host_set_token_in() (UPCFG0X = (UPCFG0X & ~MSK_TOKEN_SETUP) | MSK_TOKEN_IN)
743  //! sets OUT token
744 #define Host_set_token_out() (UPCFG0X = (UPCFG0X & ~MSK_TOKEN_SETUP) | MSK_TOKEN_OUT)
745 
746  //! returns the number of the endpoint associated to the current pipe
747 #define Host_get_endpoint_number() (UPCFG0X & (MSK_PEPNUM))
748 
749  //! returns pipe interrupt register
750 #define Host_get_pipe_interrupt() (UPINT)
751 
752  //! sets the interrupt frequency
753 #define Host_set_interrupt_frequency(frq) (UPCFG2X = (U8)frq)
754 
755  //! tests if current pipe is configured
756 #define Is_pipe_configured() (UPSTAX & (1<<CFGOK))
757  //! tests if at least one bank is busy
758 #define Is_host_one_bank_busy() ((UPSTAX & (1<<MSK_NBUSYBK)) != 0)
759  //! returns the number of busy banks
760 #define Host_number_of_busy_bank() (UPSTAX & (1<<MSK_NBUSYBK))
761 
762  //! resets the pipe
763 #define Host_reset_pipe(p) (UPRST = 1<<p , UPRST = 0)
764 
765  //! writes a byte into the pipe FIFO
766 #define Host_write_byte(dat) (UPDATX = dat)
767  //! reads a byte from the pipe FIFO
768 #define Host_read_byte() (UPDATX)
769 
770  //! freezes the pipe
771 #define Host_freeze_pipe() (UPCONX |= (1<<PFREEZE))
772  //! un-freezees the pipe
773 #define Host_unfreeze_pipe() (UPCONX &= ~(1<<PFREEZE))
774  //! tests if the current pipe is frozen
775 #define Is_host_pipe_freeze() (UPCONX & (1<<PFREEZE))
776 
777  //! resets data toggle
778 #define Host_reset_pipe_data_toggle() (UPCONX |= (1<<RSTDT) )
779 
780  //! tests if SETUP has been sent
781 #define Is_host_setup_sent() ((UPINTX & (1<<TXSTPI)) ? TRUE : FALSE)
782  //! tests if control IN has been received
783 #define Is_host_control_in_received() ((UPINTX & (1<<RXINI)) ? TRUE : FALSE)
784  //! tests if control OUT has been sent
785 #define Is_host_control_out_sent() ((UPINTX & (1<<TXOUTI)) ? TRUE : FALSE)
786  //! tests if a STALL has been received
787 #define Is_host_stall() ((UPINTX & (1<<RXSTALLI)) ? TRUE : FALSE)
788  //! tests if an error occurs on current pipe
789 #define Is_host_pipe_error() ((UPINTX & (1<<PERRI)) ? TRUE : FALSE)
790  //! sends a setup
791 #define Host_send_setup() (UPINTX &= ~(1<<FIFOCON))
792  //! sends a control IN
793 #define Host_send_control_in() (UPINTX &= ~(1<<FIFOCON))
794  //! sends a control OUT
795 #define Host_send_control_out() (UPINTX &= ~(1<<FIFOCON))
796  //! acks control OUT
797 #define Host_ack_control_out() (UPINTX &= ~(1<<TXOUTI))
798  //! acks control IN
799 #define Host_ack_control_in() (UPINTX &= ~(1<<RXINI))
800  //! acks setup
801 #define Host_ack_setup() (UPINTX &= ~(1<<TXSTPI))
802  //! acks STALL reception
803 #define Host_ack_stall() (UPINTX &= ~(1<<RXSTALLI))
804 
805  //! sends a OUT
806 #define Host_send_out() (UPINTX &= ~(1<<FIFOCON))
807  //! tests if OUT has been sent
808 #define Is_host_out_sent() ((UPINTX & (1<<TXOUTI)) ? TRUE : FALSE)
809  //! acks OUT sent
810 #define Host_ack_out_sent() (UPINTX &= ~(1<<TXOUTI))
811  //! tests if IN received
812 #define Is_host_in_received() ((UPINTX & (1<<RXINI)) ? TRUE : FALSE)
813  //! acks IN reception
814 #define Host_ack_in_received() (UPINTX &= ~(1<<RXINI))
815  //! sends a IN
816 #define Host_send_in() (UPINTX &= ~(1<<FIFOCON))
817  //! tests if nak handshake has been received
818 #define Is_host_nak_received() ((UPINTX & (1<<NAKEDI)) ? TRUE : FALSE)
819  //! acks NAk received sent
820 #define Host_ack_nak_received() (UPINTX &= ~(1<<NAKEDI))
821 
822 
823 
824  //! tests if endpoint read allowed
825 #define Is_host_read_enabled() (UPINTX&(1<<RWAL))
826  //! tests if endpoint read allowed
827 #define Is_host_write_enabled() (UPINTX&(1<<RWAL))
828 
829  //! sets IN in standard mode
830 #define Host_standard_in_mode() (UPCONX &= ~(1<<INMODE))
831  //! sets IN in continuous mode
832 #define Host_continuous_in_mode() (UPCONX |= (1<<INMODE))
833 
834  //! sets number of IN requests to perform before freeze
835 #define Host_in_request_number(in_num) (UPINRQX = (U8)in_num)
836  //! returns number of remaining IN requests
837 #define Host_get_in_request_number() (UPINRQX)
838 
839  //! returns number of bytes (8 bits)
840 #define Host_data_length_U8() (UPBCLX)
841  //! returns number of bytes (16 bits)
842 #define Host_data_length_U16() ((((U16)UPBCHX)<<8) | UPBCLX)
843  //! for device compatibility
844 #define Host_byte_counter() Host_data_length_U16()
845  //! for device compatibility
846 #define Host_byte_counter_8() Host_data_length_U8()
847 
848  //! returns the size of the current pipe
849 #define Host_get_pipe_length() ((U16)0x08 << ((UPCFG1X & MSK_PSIZE)>>4))
850 
851  //! returns the type of the current pipe
852 #define Host_get_pipe_type() (UPCFG0X>>6)
853 
854  //! tests if error occurs on pipe
855 #define Host_error_status() (UPERRX & MSK_ERROR)
856  //! acks all pipe error
857 #define Host_ack_all_errors() (UPERRX = 0x00)
858 
859  //! Enable pipe end transmission interrupt
860 #define Host_enable_transmit_interrupt() (UPIENX |= (1<<TXOUTE))
861  //! Disable pipe end transmission interrupt
862 #define Host_disable_transmit_interrupt() (UPIENX &= ~(1<<TXOUTE))
863 
864  //! Enable pipe reception interrupt
865 #define Host_enable_receive_interrupt() (UPIENX |= (1<<RXINE))
866  //! Disable pipe recption interrupt
867 #define Host_disable_receive_interrupt() (UPIENX &= ~(1<<RXINE))
868 
869  //! Enable pipe stall interrupt
870 #define Host_enable_stall_interrupt() (UPIENX |= (1<<RXSTALLE))
871  //! Disable pipe stall interrupt
872 #define Host_disable_stall_interrupt() (UPIENX &= ~(1<<RXSTALLE))
873 
874  //! Enable pipe error interrupt
875 #define Host_enable_error_interrupt() (UPIENX |= (1<<PERRE))
876  //! Disable pipe error interrupt
877 #define Host_disable_error_interrupt() (UPIENX &= ~(1<<PERRE))
878 
879  //! Enable pipe NAK interrupt
880 #define Host_enable_nak_interrupt() (UPIENX |= (1<<NAKEDE))
881  //! Disable pipe NAK interrupt
882 #define Host_disable_nak_interrupt() (UPIENX &= ~(1<<NAKEDE))
883 
884 #define Get_pipe_token(x) ((x & (0x80)) ? TOKEN_IN : TOKEN_OUT)
885 
886 //! @}
887 
888 //! wSWAP
889 //! This macro swaps the U8 order in words.
890 //!
891 //! @param x (U16) the 16 bit word to swap
892 //!
893 //! @return (U16) the 16 bit word x with the 2 bytes swaped
894 
895 #define wSWAP(x) \
896  ( (((x)>>8)&0x00FF) \
897  | (((x)<<8)&0xFF00) \
898  )
899 
900 
901 //! Usb_write_word_enum_struc
902 //! This macro help to fill the U16 fill in USB enumeration struct.
903 //! Depending on the CPU architecture, the macro swap or not the nibbles
904 //!
905 //! @param x (U16) the 16 bit word to be written
906 //!
907 //! @return (U16) the 16 bit word written
908 #if !defined(BIG_ENDIAN) && !defined(LITTLE_ENDIAN)
909  #error YOU MUST Define the Endian Type of target: LITTLE_ENDIAN or BIG_ENDIAN
910 #endif
911 #ifdef LITTLE_ENDIAN
912  #define Usb_write_word_enum_struc(x) (x)
913 #else //BIG_ENDIAN
914  #define Usb_write_word_enum_struc(x) (wSWAP(x))
915 #endif
916 
917 
918 //_____ D E C L A R A T I O N ______________________________________________
919 
920 U8 usb_config_ep (U8, U8);
922 U8 usb_send_packet (U8 , U8*, U8);
923 U8 usb_read_packet (U8 , U8*, U8);
924 void usb_halt_endpoint (U8);
925 U8 usb_init_device (void);
926 
927 U8 host_config_pipe (U8, U8);
928 U8 host_determine_pipe_size (U16);
929 void host_disable_all_pipe (void);
930 U8 usb_get_nb_pipe_interrupt (void);
931 
932 U8 usb_endpoint_wait_for_read_control_enabled();
933 U8 usb_endpoint_wait_for_write_enabled();
934 U8 usb_endpoint_wait_for_receive_out();
935 U8 usb_endpoint_wait_for_IN_ready();
936 
937 #define usb_endpoint_wait_for_read_enabled usb_endpoint_wait_for_write_enabled
938 
939 #endif // _USB_DRV_H_
940 
941 /** @} */