Contiki 2.5
isr.c
1 /*
2  * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
3  * to the MC1322x project (http://mc1322x.devl.org)
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in the
13  * documentation and/or other materials provided with the distribution.
14  * 3. Neither the name of the Institute nor the names of its contributors
15  * may be used to endorse or promote products derived from this software
16  * without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * This file is part of libmc1322x: see http://mc1322x.devl.org
31  * for details.
32  *
33  *
34  */
35 
36 #include <mc1322x.h>
37 #include <stdint.h>
38 
39 static void (*tmr_isr_funcs[4])(void) = {
40  tmr0_isr,
41  tmr1_isr,
42  tmr2_isr,
43  tmr3_isr
44 };
45 
46 void irq_register_timer_handler(int timer, void (*isr)(void))
47 {
48  tmr_isr_funcs[timer] = isr;
49 }
50 
51 
52 __attribute__ ((section (".irq")))
53 __attribute__ ((interrupt("IRQ")))
54 void irq(void)
55 {
56  uint32_t pending;
57 
58  while ((pending = *NIPEND)) {
59 
60  if(bit_is_set(pending, INT_NUM_TMR)) {
61  /* dispatch to individual timer isrs if they exist */
62  /* timer isrs are responsible for determining if they
63  * caused an interrupt */
64  /* and clearing their own interrupt flags */
65  if (tmr_isr_funcs[0] != 0) { (tmr_isr_funcs[0])(); }
66  if (tmr_isr_funcs[1] != 0) { (tmr_isr_funcs[1])(); }
67  if (tmr_isr_funcs[2] != 0) { (tmr_isr_funcs[2])(); }
68  if (tmr_isr_funcs[3] != 0) { (tmr_isr_funcs[3])(); }
69  }
70 
71  if(bit_is_set(pending, INT_NUM_MACA)) {
72  if(maca_isr != 0) { maca_isr(); }
73  }
74  if(bit_is_set(pending, INT_NUM_UART1)) {
75  if(uart1_isr != 0) { uart1_isr(); }
76  }
77  if(bit_is_set(pending, INT_NUM_UART2)) {
78  if(uart2_isr != 0) { uart2_isr(); }
79  }
80  if(bit_is_set(pending, INT_NUM_CRM)) {
81  if(rtc_wu_evt() && (rtc_isr != 0)) { rtc_isr(); }
82  if(kbi_evnt(4) && (kbi4_isr != 0)) { kbi4_isr(); }
83  if(kbi_evnt(5) && (kbi5_isr != 0)) { kbi5_isr(); }
84  if(kbi_evnt(6) && (kbi6_isr != 0)) { kbi6_isr(); }
85  if(kbi_evnt(7) && (kbi7_isr != 0)) { kbi7_isr(); }
86 
87  if (CRM->STATUSbits.CAL_DONE && CRM->CAL_CNTLbits.CAL_IEN && cal_isr)
88  {
89  CRM->STATUSbits.CAL_DONE = 0;
90  cal_isr();
91  }
92  }
93  if(bit_is_set(pending, INT_NUM_ASM)) {
94  if(asm_isr != 0) { asm_isr(); }
95  }
96  if (bit_is_set(pending, INT_NUM_I2C)) {
97  if (i2c_isr != 0) { i2c_isr(); }
98  }
99 
100  *INTFRC = 0; /* stop forcing interrupts */
101 
102  }
103 }