Contiki 2.5
uart_init.c
Go to the documentation of this file.
1 /**
2  * \file
3  *
4  * uart initialization routines
5  *
6  * \author
7  *
8  * Anthony "Asterisk" Ambuehl
9  *
10  * non-interrupt routines typically only called once, stored in any bank.
11  *
12  */
13 #include <stdlib.h>
14 #include <string.h>
15 
16 #include "banked.h"
17 #include "cc2430_sfr.h"
18 
19 #include "dev/leds.h"
20 #include "dev/uart.h"
21 
22 /*---------------------------------------------------------------------------*/
23 void
24 uart0_init(uint32_t speed) __banked
25 {
26  if(speed == 115200) {
27  U0BAUD=216; /*115200*/
28  U0GCR =11; /*LSB first and 115200*/
29  }
30  else if(speed == 38400) {
31  U0BAUD=59; /*38400*/
32  U0GCR =10; /*LSB first and 38400*/
33  }
34  else if(speed == 9600) {
35  U0BAUD= 59; /* 9600 */
36  U0GCR = 8; /*LSB first and 9600*/
37  }
38  else { return; }
39 
40 #ifdef UART0_ALTERNATIVE_2
41  PERCFG |= U0CFG; /*alternative port 2 = P1.5-2*/
42 #ifdef UART0_RTSCTS
43  P1SEL |= 0x3C; /*peripheral select for TX and RX, RTS, CTS*/
44 #else
45  P1SEL |= 0x30; /*peripheral select for TX and RX*/
46  P1 &= ~0x08; /*RTS down*/
47 #endif
48  P1DIR |= 0x28; /*RTS, TX out*/
49  P1DIR &= ~0x14; /*CTS & RX in*/
50 #else
51  PERCFG &= ~U0CFG; /*alternative port 1 = P0.5-2*/
52 #ifdef UART0_RTSCTS
53  P0SEL |= 0x3C; /*peripheral select for TX and RX, RTS, CTS*/
54 #else
55  P0SEL |= 0x0C; /*peripheral select for TX and RX*/
56  P0 &= ~0x20; /*RTS down*/
57 #endif
58  P0DIR |= 0x28; /*RTS & TX out*/
59  P0DIR &= ~0x14; /*CTS & RX in*/
60 #endif
61 
62 
63 #ifdef UART0_RTSCTS
64  U0UCR = 0x42; /*defaults: 8N1, RTS/CTS, high stop bit*/
65 #else
66  U0UCR = 0x02; /*defaults: 8N1, no flow control, high stop bit*/
67 #endif
68 
69  U0CSR = U_MODE | U_RE | U_TXB; /*UART mode, receiver enable, TX done*/
70 
71  /*set priority group of group 3 to highest, so the UART won't miss bytes*/
72  IP1 |= IP1_3;
73  IP0 |= IP0_3;
74 
75  IEN0_URX0IE = 1;
76 }
77 /*---------------------------------------------------------------------------*/
78 /* UART1 initialization */
79 void
80 uart1_init(uint32_t speed) __banked
81 {
82 #ifdef UART1_ALTERNATIVE_1
83  PERCFG &= ~U1CFG; /*alternative port 1 = P0.5-2*/
84 #ifdef UART1_RTSCTS
85  P0SEL |= 0x3C; /*peripheral select for TX and RX, RTS, CTS*/
86 #else
87  P0SEL |= 0x30; /*peripheral select for TX and RX*/
88  P0 &= ~0x08; /*RTS down*/
89 #endif
90  P0DIR |= 0x18; /*RTS, TX out*/
91  P0DIR &= ~0x24; /*CTS, RX in*/
92 #else
93  PERCFG |= U1CFG; /*alternative port 2 = P1.7-4*/
94 #ifdef UART1_RTSCTS
95  P1SEL |= 0xF0; /*peripheral select for TX and RX*/
96 #else
97  P1SEL |= 0xC0; /*peripheral select for TX and RX*/
98  P1 &= ~0x20; /*RTS down*/
99 #endif
100  P1DIR |= 0x60; /*RTS, TX out*/
101  P1DIR &= ~0x90; /*CTS, RX in*/
102 #endif
103 
104  if(speed == 115200) {
105  U1BAUD=216; /*115200*/
106  U1GCR =11; /*LSB first and 115200*/
107  }
108 
109  if(speed == 38400) {
110  U1BAUD=59; /*38400*/
111  U1GCR =10; /*LSB first and 38400*/
112  }
113 
114  if(speed == 9600) {
115  U1BAUD= 59; /* 9600 */
116  U1GCR = 8; /*LSB first and 9600*/
117  }
118 
119 #ifdef UART1_RTSCTS
120  U1UCR = 0x42; /*defaults: 8N1, RTS/CTS, high stop bit*/
121 #else
122  U1UCR = 0x02; /*defaults: 8N1, no flow control, high stop bit*/
123 #endif
124 
125  U1CSR = U_MODE | U_RE | U_TXB; /*UART mode, receiver enable, TX done*/
126 
127  /*set priority group of group 3 to highest, so the UART won't miss bytes*/
128  IP1 |= IP1_3;
129  IP0 |= IP0_3;
130 
131  IEN0_URX1IE = 1; /* Enable the RX interrupt */
132 }
133 /*---------------------------------------------------------------------------*/