Contiki 2.5
hal.h
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1 /* Copyright (c) 2008, Swedish Institute of Computer Science
2  * All rights reserved.
3  *
4  * Additional fixes for AVR contributed by:
5  *
6  * Colin O'Flynn coflynn@newae.com
7  * Eric Gnoske egnoske@gmail.com
8  * Blake Leverett bleverett@gmail.com
9  * Mike Vidales mavida404@gmail.com
10  * Kevin Brown kbrown3@uccs.edu
11  * Nate Bohlmann nate@elfwerks.com
12  *
13  * All rights reserved.
14  *
15  * Redistribution and use in source and binary forms, with or without
16  * modification, are permitted provided that the following conditions are met:
17  *
18  * * Redistributions of source code must retain the above copyright
19  * notice, this list of conditions and the following disclaimer.
20  * * Redistributions in binary form must reproduce the above copyright
21  * notice, this list of conditions and the following disclaimer in
22  * the documentation and/or other materials provided with the
23  * distribution.
24  * * Neither the name of the copyright holders nor the names of
25  * contributors may be used to endorse or promote products derived
26  * from this software without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
29  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
32  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38  * POSSIBILITY OF SUCH DAMAGE.
39  */
40 
41 /**
42  * \addtogroup hal
43  * @{
44  */
45 
46 /**
47  * \file
48  * \brief This file contains low-level radio driver code.
49  *
50  * $Id: hal.h,v 1.5 2010/12/03 20:42:01 dak664 Exp $
51 */
52 
53 #ifndef HAL_AVR_H
54 #define HAL_AVR_H
55 /*============================ INCLUDE =======================================*/
56 #include <stdint.h>
57 #include <stdbool.h>
58 //#include <util/crc16.h>
59 #include "contiki-conf.h"
60 /*============================ MACROS ========================================*/
61 
62 // TEST CODE
63 #define TRIG1 DDRB |= 0x04, PINB |= 0x04
64 #define TRIG2 DDRD |= 0x80, PIND |= 0x80
65 
66 /** \name This is the list of pin configurations needed for a given platform.
67  * \brief Change these values to port to other platforms.
68  * \{
69  */
70 /* Define all possible revisions here */
71 // Don't use zero, it will match if undefined!
72 // RAVEN_D : Raven kit with LCD display
73 // RAVENUSB_C : used for USB key or Raven card
74 // RCB_B : RZ200 kit from Atmel based on 1281V
75 // ZIGBIT : Zigbit module from Meshnetics
76 // ATMEGA128RFA1 : Bare chip with internal radio
77 // IRIS : IRIS Mote from MEMSIC
78 #define RAVEN_D 4
79 #define RAVENUSB_C 1
80 #define INGA_12 1
81 #define RCB_B 2
82 #define ZIGBIT 3
83 #define ATMEGA128RFA1 4
84 #define IRIS 5
85 
86 
87 
88 /* TODO: Move to platform (or CPU specific) */
89 #if RCB_REVISION == RCB_B
90 /* 1281 rcb */
91 # define SSPORT B
92 # define SSPIN (0x00)
93 # define SPIPORT B
94 # define MOSIPIN (0x02)
95 # define MISOPIN (0x03)
96 # define SCKPIN (0x01)
97 # define RSTPORT B
98 # define RSTPIN (0x05)
99 # define IRQPORT D
100 # define IRQPIN (0x04)
101 # define SLPTRPORT B
102 # define SLPTRPIN (0x04)
103 # define USART 1
104 # define USARTVECT USART1_RX_vect
105 # define TICKTIMER 3
106 # define HAS_SPARE_TIMER
107 
108 #elif HARWARE_REVISION == ZIGBIT
109 /* 1281V Zigbit */
110 # define SSPORT B
111 # define SSPIN (0x00)
112 # define SPIPORT B
113 # define MOSIPIN (0x02)
114 # define MISOPIN (0x03)
115 # define SCKPIN (0x01)
116 # define RSTPORT A
117 # define RSTPIN (0x07)
118 # define IRQPORT E
119 # define IRQPIN (0x05)
120 # define SLPTRPORT B
121 # define SLPTRPIN (0x04)
122 # define TXCWPORT B
123 # define TXCWPIN (0x07)
124 # define USART 1
125 # define USARTVECT USART1_RX_vect
126 //# define TICKTIMER 3
127 //# define HAS_SPARE_TIMER // Not used
128 
129 #elif INGA_REVISION == INGA_12
130 /* 1284 raven */
131 # define SSPORT B
132 # define SSPIN (0x04)
133 # define SPIPORT B
134 # define MOSIPIN (0x05)
135 # define MISOPIN (0x06)
136 # define SCKPIN (0x07)
137 # define RSTPORT B
138 # define RSTPIN (0x01)
139 # define IRQPORT D
140 # define IRQPIN (0x06)
141 # define SLPTRPORT B
142 # define SLPTRPIN (0x03)
143 # define TXCWPORT B
144 # define TXCWPIN (0x00)
145 # define USART 0
146 # define USARTVECT USART0_RX_vect
147 # define TICKTIMER 3
148 # define HAS_CW_MODE
149 # define HAS_SPARE_TIMER
150 
151 #elif RAVEN_REVISION == RAVEN_D
152 /* 1284 raven */
153 # define SSPORT B
154 # define SSPIN (0x04)
155 # define SPIPORT B
156 # define MOSIPIN (0x05)
157 # define MISOPIN (0x06)
158 # define SCKPIN (0x07)
159 # define RSTPORT B
160 # define RSTPIN (0x01)
161 # define IRQPORT D
162 # define IRQPIN (0x06)
163 # define SLPTRPORT B
164 # define SLPTRPIN (0x03)
165 # define TXCWPORT B
166 # define TXCWPIN (0x00)
167 # define USART 1
168 # define USARTVECT USART1_RX_vect
169 # define TICKTIMER 3
170 # define HAS_CW_MODE
171 # define HAS_SPARE_TIMER
172 
173 #elif RAVEN_REVISION == RAVENUSB_C
174 /* 1287USB raven */
175 # define SSPORT B
176 # define SSPIN (0x00)
177 # define SPIPORT B
178 # define MOSIPIN (0x02)
179 # define MISOPIN (0x03)
180 # define SCKPIN (0x01)
181 # define RSTPORT B
182 # define RSTPIN (0x05)
183 # define IRQPORT D
184 # define IRQPIN (0x04)
185 # define SLPTRPORT B
186 # define SLPTRPIN (0x04)
187 # define TXCWPORT B
188 # define TXCWPIN (0x07)
189 # define USART 1
190 # define USARTVECT USART1_RX_vect
191 # define TICKTIMER 3
192 # define HAS_CW_MODE
193 # define HAS_SPARE_TIMER
194 
195 #elif HARWARE_REVISION == ATMEGA128RFA1
196 /* ATmega1281 with internal AT86RF231 radio */
197 #if 0
198 # define SSPORT B
199 # define SSPIN (0x04)
200 # define SPIPORT B
201 # define MOSIPIN (0x05)
202 # define MISOPIN (0x06)
203 # define SCKPIN (0x07)
204 # define RSTPORT B
205 # define RSTPIN (0x01)
206 # define IRQPORT D
207 # define IRQPIN (0x06)
208 # define SLPTRPORT B
209 # define SLPTRPIN (0x03)
210 # define TXCWPORT B
211 # define TXCWPIN (0x00)
212 #endif
213 # define SLPTRPORT TRXPR
214 # define SLPTRPIN 1
215 # define USART 1
216 # define USARTVECT USART1_RX_vect
217 # define TICKTIMER 3
218 # define HAS_CW_MODE
219 # define HAS_SPARE_TIMER
220 
221 #elif CONTIKI_TARGET_MULLE
222 /* mulle 5.2 (TODO: move to platform specific) */
223 
224 # define SSPORT 3
225 # define SSPIN 5
226 # define MOSIPORT 1
227 # define MOSIPIN 1
228 # define MISOPORT 1
229 # define MISOPIN 0
230 # define SCKPORT 3
231 # define SCKPIN 3
232 # define RSTPORT 4
233 # define RSTPIN 3
234 # define IRQPORT 8
235 # define IRQPIN 3
236 # define SLPTRPORT 0
237 # define SLPTRPIN 7
238 # define HAS_SPARE_TIMER
239 
240 
241 #elif HARWARE_REVISION == IRIS
242 /* 1281 IRIS */
243 # define SSPORT B
244 # define SSPIN (0x00)
245 # define SPIPORT B
246 # define MOSIPIN (0x02)
247 # define MISOPIN (0x03)
248 # define SCKPIN (0x01)
249 # define RSTPORT A
250 # define RSTPIN (0x06)
251 # define IRQPORT D
252 # define IRQPIN (0x04)
253 # define SLPTRPORT B
254 # define SLPTRPIN (0x07)
255 //# define TXCWPORT B
256 //# define TXCWPIN (0x07)
257 # define USART 1
258 # define USARTVECT USART1_RX_vect
259 //# define TICKTIMER 3
260 //# define HAS_SPARE_TIMER // Not used
261 #else
262 
263 #error "Platform undefined in hal.h"
264 
265 #endif
266 
267 /* For architectures that have all SPI signals on the same port */
268 #ifndef SSPORT
269 #define SSPORT SPIPORT
270 #endif
271 
272 #ifndef SCKPORT
273 #define SCKPORT SPIPORT
274 #endif
275 
276 #ifndef MOSIPORT
277 #define MOSIPORT SPIPORT
278 #endif
279 
280 #ifndef MISOPORT
281 #define MISOPORT SPIPORT
282 #endif
283 
284 /** \} */
285 
286 /**
287  * \name Macros used to generate read register names from platform-specific definitions of ports.
288  * \brief The various CAT macros (DDR, PORT, and PIN) are used to
289  * assign port/pin/DDR names to various macro variables. The
290  * variables are assigned based on the specific connections made in
291  * the hardware. For example TCCR(TICKTIMER,A) can be used in place of TCCR0A
292  * if TICKTIMER is defined as 0.
293  * \{
294  */
295 #if defined(__AVR__)
296 #define CAT(x, y) x##y
297 #define CAT2(x, y, z) x##y##z
298 #define DDR(x) CAT(DDR, x)
299 #define PORT(x) CAT(PORT, x)
300 #define PIN(x) CAT(PIN, x)
301 #define UCSR(num, let) CAT2(UCSR,num,let)
302 #define RXEN(x) CAT(RXEN,x)
303 #define TXEN(x) CAT(TXEN,x)
304 #define TXC(x) CAT(TXC,x)
305 #define RXC(x) CAT(RXC,x)
306 #define RXCIE(x) CAT(RXCIE,x)
307 #define UCSZ(x,y) CAT2(UCSZ,x,y)
308 #define UBRR(x,y) CAT2(UBRR,x,y)
309 #define UDRE(x) CAT(UDRE,x)
310 #define UDRIE(x) CAT(UDRIE,x)
311 #define UDR(x) CAT(UDR,x)
312 #define TCNT(x) CAT(TCNT,x)
313 #define TIMSK(x) CAT(TIMSK,x)
314 #define TCCR(x,y) CAT2(TCCR,x,y)
315 #define COM(x,y) CAT2(COM,x,y)
316 #define OCR(x,y) CAT2(OCR,x,y)
317 #define CS(x,y) CAT2(CS,x,y)
318 #define WGM(x,y) CAT2(WGM,x,y)
319 #define OCIE(x,y) CAT2(OCIE,x,y)
320 #define COMPVECT(x) CAT2(TIMER,x,_COMPA_vect)
321 #define UDREVECT(x) CAT2(USART,x,_UDRE_vect)
322 #define RXVECT(x) CAT2(USART,x,_RX_vect)
323 #endif
324 
325 /* TODO: Move to CPU specific */
326 #if defined(CONTIKI_TARGET_MULLE)
327 #define CAT(x, y) x##y.BYTE
328 #define CAT2(x, y, z) x##y##z.BYTE
329 #define DDR(x) CAT(PD, x)
330 #define PORT(x) CAT(P, x)
331 #define PIN(x) CAT(P, x)
332 #define UCSR(num, let) CAT2(UCSR,num,let)
333 #define RXEN(x) CAT(RXEN,x)
334 #define TXEN(x) CAT(TXEN,x)
335 #define TXC(x) CAT(TXC,x)
336 #define RXC(x) CAT(RXC,x)
337 #define RXCIE(x) CAT(RXCIE,x)
338 #define UCSZ(x,y) CAT2(UCSZ,x,y)
339 #define UBRR(x,y) CAT2(UBRR,x,y)
340 #define UDRE(x) CAT(UDRE,x)
341 #define UDRIE(x) CAT(UDRIE,x)
342 #define UDR(x) CAT(UDR,x)
343 #define TCNT(x) CAT(TCNT,x)
344 #define TIMSK(x) CAT(TIMSK,x)
345 #define TCCR(x,y) CAT2(TCCR,x,y)
346 #define COM(x,y) CAT2(COM,x,y)
347 #define OCR(x,y) CAT2(OCR,x,y)
348 #define CS(x,y) CAT2(CS,x,y)
349 #define WGM(x,y) CAT2(WGM,x,y)
350 #define OCIE(x,y) CAT2(OCIE,x,y)
351 #define COMPVECT(x) CAT2(TIMER,x,_COMPA_vect)
352 #define UDREVECT(x) CAT2(USART,x,_UDRE_vect)
353 #define RXVECT(x) CAT2(USART,x,_RX_vect)
354 #endif
355 
356 /** \} */
357 
358 /**
359  * \name Pin macros
360  * \brief These macros convert the platform-specific pin defines into names and functions
361  * that the source code can directly use.
362  * \{
363  */
364 #if defined(__AVR_ATmega128RFA1__)
365 
366 #define hal_set_rst_low( ) ( TRXPR &= ~( 1 << TRXRST ) ) /**< This macro pulls the RST pin low. */
367 #define hal_set_rst_high( ) ( TRXPR |= ( 1 << TRXRST ) ) /**< This macro pulls the RST pin high. */
368 #define hal_set_slptr_high( ) ( TRXPR |= ( 1 << SLPTR ) ) /**< This macro pulls the SLP_TR pin high. */
369 #define hal_set_slptr_low( ) ( TRXPR &= ~( 1 << SLPTR ) ) /**< This macro pulls the SLP_TR pin low. */
370 //#define hal_get_slptr( ) ( ( TRXPR & ( 1 << SLPTR ) ) >> SLPTR ) /**< Read current state of the SLP_TR pin (High/Low). */
371 #define hal_get_slptr( ) ( TRXPR & ( 1 << SLPTR ) ) /**< Read current state of the SLP_TR pin (High/Low). */
372 
373 #else
374 #define SLP_TR SLPTRPIN /**< Pin number that corresponds to the SLP_TR pin. */
375 #define DDR_SLP_TR DDR( SLPTRPORT ) /**< Data Direction Register that corresponds to the port where SLP_TR is connected. */
376 #define PORT_SLP_TR PORT( SLPTRPORT ) /**< Port (Write Access) where SLP_TR is connected. */
377 #define PIN_SLP_TR PIN( SLPTRPORT ) /**< Pin (Read Access) where SLP_TR is connected. */
378 #define hal_set_slptr_high( ) ( PORT_SLP_TR |= ( 1 << SLP_TR ) ) /**< This macro pulls the SLP_TR pin high. */
379 #define hal_set_slptr_low( ) ( PORT_SLP_TR &= ~( 1 << SLP_TR ) ) /**< This macro pulls the SLP_TR pin low. */
380 //#define hal_get_slptr( ) ( ( PIN_SLP_TR & ( 1 << SLP_TR ) ) >> SLP_TR ) /**< Read current state of the SLP_TR pin (High/Low). */
381 #define hal_get_slptr( ) ( PIN_SLP_TR & ( 1 << SLP_TR ) ) /**< Read current state of the SLP_TR pin (High/Low). */
382 #define RST RSTPIN /**< Pin number that corresponds to the RST pin. */
383 #define DDR_RST DDR( RSTPORT ) /**< Data Direction Register that corresponds to the port where RST is */
384 #define PORT_RST PORT( RSTPORT ) /**< Port (Write Access) where RST is connected. */
385 #define PIN_RST PIN( RSTPORT /* BUG? */) /**< Pin (Read Access) where RST is connected. */
386 #define hal_set_rst_high( ) ( PORT_RST |= ( 1 << RST ) ) /**< This macro pulls the RST pin high. */
387 #define hal_set_rst_low( ) ( PORT_RST &= ~( 1 << RST ) ) /**< This macro pulls the RST pin low. */
388 #define hal_get_rst( ) ( ( PIN_RST & ( 1 << RST ) ) >> RST ) /**< Read current state of the RST pin (High/Low). */
389 #define HAL_SS_PIN SSPIN /**< The slave select pin. */
390 #define HAL_SCK_PIN SCKPIN /**< Data bit for SCK. */
391 #define HAL_MOSI_PIN MOSIPIN
392 #define HAL_MISO_PIN MISOPIN
393 #define HAL_PORT_SPI PORT( SPIPORT ) /**< The SPI module is located on PORTB. */
394 #define HAL_PORT_SS PORT( SSPORT )
395 #define HAL_PORT_SCK PORT( SCKPORT )
396 #define HAL_PORT_MOSI PORT( MOSIPORT ) /**< The SPI module uses GPIO might be split on different ports. */
397 #define HAL_PORT_MISO PORT( MISOPORT ) /**< The SPI module uses GPIO might be split on different ports. */
398 #define HAL_DDR_SPI DDR( SPIPORT ) /**< Data Direction Register for PORTB. */
399 #define HAL_DDR_SS DDR( SSPORT ) /**< Data Direction Register for MISO GPIO pin. */
400 #define HAL_DDR_SCK DDR( SCKPORT ) /**< Data Direction Register for MISO GPIO pin. */
401 #define HAL_DDR_MOSI DDR( MOSIPORT ) /**< Data Direction Register for MISO GPIO pin. */
402 #define HAL_DDR_MISO DDR( MISOPORT ) /**< Data Direction Register for MOSI GPIO pin. */
403 #define HAL_DD_SS SSPIN /**< Data Direction bit for SS. */
404 #define HAL_DD_SCK SCKPIN /**< Data Direction bit for SCK. */
405 #define HAL_DD_MOSI MOSIPIN /**< Data Direction bit for MOSI. */
406 #define HAL_DD_MISO MISOPIN /**< Data Direction bit for MISO. */
407 #endif /* defined(__AVR_ATmega128RFA1__) */
408 
409 /** \} */
410 
411 
412 #define HAL_SS_HIGH( ) (HAL_PORT_SS |= ( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS high. */
413 #define HAL_SS_LOW( ) (HAL_PORT_SS &= ~( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS low. */
414 
415 /** \brief Macros defined for HAL_TIMER1.
416  *
417  * These macros are used to define the correct setupt of the AVR's Timer1, and
418  * to ensure that the hal_get_system_time function returns the system time in
419  * symbols (16 us ticks).
420  */
421 
422 #if defined(__AVR__)
423 #if ( F_CPU == 16000000UL )
424  #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS12 ) )
425  #define HAL_US_PER_SYMBOL ( 1 )
426  #define HAL_SYMBOL_MASK ( 0xFFFFffff )
427 #elif ( F_CPU == 8000000UL )
428  #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) )
429  #define HAL_US_PER_SYMBOL ( 2 )
430  #define HAL_SYMBOL_MASK ( 0x7FFFffff )
431 #elif ( F_CPU == 4000000UL )
432  #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) )
433  #define HAL_US_PER_SYMBOL ( 1 )
434  #define HAL_SYMBOL_MASK ( 0xFFFFffff )
435 #elif ( F_CPU == 1000000UL )
436  #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) )
437  #define HAL_US_PER_SYMBOL ( 2 )
438  #define HAL_SYMBOL_MASK ( 0x7FFFffff )
439 #else
440  #error "Clock speed not supported."
441 #endif
442 
443 #if HARWARE_REVISION == ZIGBIT
444 // IRQ E5 for Zigbit example
445 #define RADIO_VECT INT5_vect
446 #define HAL_ENABLE_RADIO_INTERRUPT( ) { ( EIMSK |= ( 1 << INT5 ) ) ; EICRB |= 0x0C ; PORTE &= ~(1<<PE5); DDRE &= ~(1<<DDE5); }
447 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( EIMSK &= ~( 1 << INT5 ) )
448 #else
449 #define RADIO_VECT TIMER1_CAPT_vect
450 // Raven and Jackdaw
451 #define HAL_ENABLE_RADIO_INTERRUPT( ) ( TIMSK1 |= ( 1 << ICIE1 ) )
452 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( TIMSK1 &= ~( 1 << ICIE1 ) )
453 #endif
454 
455 #define HAL_ENABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 |= ( 1 << TOIE1 ) )
456 #define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 &= ~( 1 << TOIE1 ) )
457 
458 /** This macro will protect the following code from interrupts.*/
459 #define HAL_ENTER_CRITICAL_REGION( ) {uint8_t volatile saved_sreg = SREG; cli( )
460 
461 /** This macro must always be used in conjunction with HAL_ENTER_CRITICAL_REGION
462  so that interrupts are enabled again.*/
463 #define HAL_LEAVE_CRITICAL_REGION( ) SREG = saved_sreg;}
464 
465 #else /* MULLE */
466 
467 #define HAL_ENABLE_RADIO_INTERRUPT( ) ( INT1IC.BYTE |= 1 )
468 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( INT1IC.BYTE &= ~(1) )
469 
470 #define HAL_ENABLE_OVERFLOW_INTERRUPT( ) ( TB4IC.BYTE = 1 )
471 #define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TB4IC.BYTE = 0 )
472 
473 /** This macro will protect the following code from interrupts.*/
474 #define HAL_ENTER_CRITICAL_REGION( ) MULLE_ENTER_CRITICAL_REGION( )
475 
476 /** This macro must always be used in conjunction with HAL_ENTER_CRITICAL_REGION
477  so that interrupts are enabled again.*/
478 #define HAL_LEAVE_CRITICAL_REGION( ) MULLE_LEAVE_CRITICAL_REGION( )
479 
480 #endif /* !__AVR__ */
481 
482 
483 /** \brief Enable the interrupt from the radio transceiver.
484  */
485 #define hal_enable_trx_interrupt( ) HAL_ENABLE_RADIO_INTERRUPT( )
486 
487 /** \brief Disable the interrupt from the radio transceiver.
488  *
489  * \retval 0 if the pin is low, 1 if the pin is high.
490  */
491 #define hal_disable_trx_interrupt( ) HAL_DISABLE_RADIO_INTERRUPT( )
492 /*============================ TYPDEFS =======================================*/
493 /*============================ PROTOTYPES ====================================*/
494 /*============================ MACROS ========================================*/
495 /** \name Macros for radio operation.
496  * \{
497  */
498 #define HAL_BAT_LOW_MASK ( 0x80 ) /**< Mask for the BAT_LOW interrupt. */
499 #define HAL_TRX_UR_MASK ( 0x40 ) /**< Mask for the TRX_UR interrupt. */
500 #define HAL_TRX_END_MASK ( 0x08 ) /**< Mask for the TRX_END interrupt. */
501 #define HAL_RX_START_MASK ( 0x04 ) /**< Mask for the RX_START interrupt. */
502 #define HAL_PLL_UNLOCK_MASK ( 0x02 ) /**< Mask for the PLL_UNLOCK interrupt. */
503 #define HAL_PLL_LOCK_MASK ( 0x01 ) /**< Mask for the PLL_LOCK interrupt. */
504 
505 #define HAL_MIN_FRAME_LENGTH ( 0x03 ) /**< A frame should be at least 3 bytes. */
506 #define HAL_MAX_FRAME_LENGTH ( 0x7F ) /**< A frame should no more than 127 bytes. */
507 /** \} */
508 /*============================ TYPDEFS =======================================*/
509 /** \struct hal_rx_frame_t
510  * \brief This struct defines the rx data container.
511  *
512  * \see hal_frame_read
513  */
514 typedef struct{
515  uint8_t length; /**< Length of frame. */
516  uint8_t data[ HAL_MAX_FRAME_LENGTH ]; /**< Actual frame data. */
517  uint8_t lqi; /**< LQI value for received frame. */
518  bool crc; /**< Flag - did CRC pass for received frame? */
520 
521 /** RX_START event handler callback type. Is called with timestamp in IEEE 802.15.4 symbols and frame length. See hal_set_rx_start_event_handler(). */
522 typedef void (*hal_rx_start_isr_event_handler_t)(uint32_t const isr_timestamp, uint8_t const frame_length);
523 
524 /** RRX_END event handler callback type. Is called with timestamp in IEEE 802.15.4 symbols and frame length. See hal_set_trx_end_event_handler(). */
525 typedef void (*hal_trx_end_isr_event_handler_t)(uint32_t const isr_timestamp);
526 
527 typedef void (*rx_callback_t) (uint16_t data);
528 
529 /*============================ PROTOTYPES ====================================*/
530 void hal_init( void );
531 
532 void hal_reset_flags( void );
533 uint8_t hal_get_bat_low_flag( void );
534 void hal_clear_bat_low_flag( void );
535 
537 void hal_set_trx_end_event_handler( hal_trx_end_isr_event_handler_t trx_end_callback_handle );
539 
543 
544 uint8_t hal_get_pll_lock_flag( void );
545 void hal_clear_pll_lock_flag( void );
546 
547 /* Hack for atmega128rfa1 with integrated radio. Access registers directly, not through SPI */
548 #if defined(__AVR_ATmega128RFA1__)
549 //#define hal_register_read(address) _SFR_MEM8((uint16_t)address)
550 #define hal_register_read(address) address
551 uint8_t hal_subregister_read( uint16_t address, uint8_t mask, uint8_t position );
552 void hal_subregister_write( uint16_t address, uint8_t mask, uint8_t position,
553  uint8_t value );
554 
555 //#define hal_register_write(address, value) _SFR_MEM8((uint16_t)address)=value
556 #define hal_register_write(address, value) address=value
557 //#define hal_subregister_read( address, mask, position ) (_SFR_MEM8((uint16_t)address)&mask)>>position
558 //#define hal_subregister_read1( address, mask, position ) (address&mask)>>position
559 //#define hal_subregister_write( address, mask, position, value ) address=(address<<position)&mask
560 #else
561 uint8_t hal_register_read( uint8_t address );
562 void hal_register_write( uint8_t address, uint8_t value );
563 uint8_t hal_subregister_read( uint8_t address, uint8_t mask, uint8_t position );
564 void hal_subregister_write( uint8_t address, uint8_t mask, uint8_t position,
565  uint8_t value );
566 #endif
567 
568 
569 
570 //void hal_frame_read(hal_rx_frame_t *rx_frame, rx_callback_t rx_callback);
571 /* For speed RF230BB does not use a callback */
572 void hal_frame_read(hal_rx_frame_t *rx_frame);
573 void hal_frame_write( uint8_t *write_buffer, uint8_t length );
574 void hal_sram_read( uint8_t address, uint8_t length, uint8_t *data );
575 void hal_sram_write( uint8_t address, uint8_t length, uint8_t *data );
576 /* Number of receive buffers in RAM. */
577 #ifndef RF230_CONF_RX_BUFFERS
578 #define RF230_CONF_RX_BUFFERS 1
579 #endif
580 
581 #endif
582 /** @} */
583 /*EOF*/